APPENDIX AVI212 Especificações Página 54

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Gaia
GAIA.ASU.SP.ESM.00007
Issue 2.00
Page 54 of 79
Astrium Ltd owns the copyright of this document which is supplied in confidence and which shall not be used for any purpose other than that for which it is supplied and shall not in
whole or in part be reproduced, copied, or communicated to any person without written permission from the owner.
GAIA.ASU.SP.ESM.00007 (Avionics SCOE Req Iss 2).doc
3.8 EGSE Real Time Network Interface Requirements
AVI-1407/CREATED/T
For closed-loop testing of Gaia AOCS, in the AVM Bench or PFM/AIT configuration, data values
output to the Spacecraft, and data values input from the Spacecraft, shall be transferred from/to the
Real Time Simulator (RTS).
AVI-1416/CREATED/R
For transfer of data with the RTS, the Avionics SCOE shall form part of a Real-Time Network (also
known as a Reflective Memory or Distributed Shared Memory Network) with the RTS and other EGSE
(Star Tracker SCOE and Dynamic FPA Simulator).
AVI-1417/CREATED/I,R
The Real Time Network (RTN) architecture has been selected by the RTS supplier. The Avionics
SCOE subcontractor shall implement the RTN connection using an interface card chosen from the
'GE Fanuc Embedded Systems' Reflective Memory range, which offers the following devices:
Note: Further details may be found at: www.gefanucembedded.com/products/family/135/
Part Number Form Factor Memory Type Memory Capacity
PCI-5565 PCI SDRAM 64 MB
PMC-5565 PCM SDRAM 64 MB
VME-5565 VME SDRAM 64 MB
CLB-5565 PCI SDRAM 64 MB
3.8.1 Real-Time Network Synchronisation and Data Transfer
AVI-2990/CREATED/T
The Avionics SCOE shall provide the synchronisation signals to all EGSE on the Real Time Network
RTN):
Real Time Simulator
Dynamic FPA Simulator
Star Tracker SCOE (2x)
AVI-2991/CREATED/T
Synchronisation shall be in the form of global interrupts on the RTN co-incident with the CSW Major
and Minor Frame control cycles (see Section 3.5.2).
Transfer of low-level (discrete) I/O between the RTS and the Avionics SCOE will be initiated by the RTS.
Data transfer for discrete I/O will be implemented at a Simulation Cycle maximum rate of 1/64 of the CSW
Major Frame control cycle (nominally 64 Hz).
The RTS will perform an interrupt-driven DMA read cycle at a fixed point at the beginning of the Simulation
Cycle to transfer discrete data acquired by the Avionics SCOE (from the Spacecraft Interfaces).
The RTS will perform an interrupt-driven DMA write cycle at a fixed point near the end of the Simulation
Cycle to transfer discrete data to the Avionics SCOE (for generation towards the Spacecraft Interfaces).
The intent of AVI-3003 and AVI-3002 (DMA usage) is to reduce overall data-latency for low-level data
transfers and to de-couple such transfers from the RTS Model execution schedule to reduce jitter at the
Spacecraft Interfaces (when compared to on-demand transfer).
AVI-4227/CREATED/T
The latency between the RTS interrupt for the DMA write cycle and the update of data at the
Spacecraft Interfaces shall be <1ms in all cases.
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